Vector Extensions for High-performance Computing
Scalable, vector-length agnostic instruction-set extensions, such as the RISC-V Vector Extension (RVV) and ARM’s Scalable Vector Extension (SVE), have strong potential for high-performance computing (HPC). Realizing that potential depends on compilers vectorizing code well and on applications making use of the vector units.
- RISC-V RVV. A TSVC-based instruction-coverage analysis compiles the TSVC benchmarks with GCC and LLVM, in both vector-length agnostic and vector-length specific modes, and checks the emitted instructions against the RVV 1.0 specification. It identifies missed instructions, classifies why vectorization fails, and suggests how benchmark suites could better reflect RVV and guide compiler development.
- ARM SVE. A study of SVE performance across HPC applications on the Nvidia Grace CPU.
This work is with Maya Gokhale and Pei-Hung Lin at Lawrence Livermore National Laboratory, Ivy Peng at KTH Royal Institute of Technology, and Jenq-Kuen Lee at National Tsing Hua University.