Paper at SC Workshops 2025: RISC-V Vectorization Coverage

Nov 7, 2025

Our paper RISC-V Vectorization Coverage for HPC: A TSVC-Based Analysis appeared at the SC ‘25 Workshops. It analyzes how well the GCC and LLVM compilers use the RISC-V Vector Extension (RVV) when auto-vectorizing the TSVC benchmarks, classifies why vectorization fails, and suggests how benchmark suites could better guide compiler development for HPC. This work is a collaboration with Hung-Ming Lai and Jenq-Kuen Lee at National Tsing Hua University, Pei-Hung Lin and Maya Gokhale at Lawrence Livermore National Laboratory, and Ivy Peng at KTH Royal Institute of Technology. Read it here, and see the vector extensions project.